627 lines
20 KiB
Text
627 lines
20 KiB
Text
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/// @ref gtc_bitfield
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#include "../simd/integer.h"
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namespace glm{
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namespace detail
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{
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template<typename PARAM, typename RET>
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GLM_FUNC_DECL RET bitfieldInterleave(PARAM x, PARAM y);
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template<typename PARAM, typename RET>
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GLM_FUNC_DECL RET bitfieldInterleave(PARAM x, PARAM y, PARAM z);
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template<typename PARAM, typename RET>
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GLM_FUNC_DECL RET bitfieldInterleave(PARAM x, PARAM y, PARAM z, PARAM w);
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template<>
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GLM_FUNC_QUALIFIER glm::uint16 bitfieldInterleave(glm::uint8 x, glm::uint8 y)
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{
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glm::uint16 REG1(x);
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glm::uint16 REG2(y);
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REG1 = ((REG1 << 4) | REG1) & static_cast<glm::uint16>(0x0F0F);
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REG2 = ((REG2 << 4) | REG2) & static_cast<glm::uint16>(0x0F0F);
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REG1 = ((REG1 << 2) | REG1) & static_cast<glm::uint16>(0x3333);
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REG2 = ((REG2 << 2) | REG2) & static_cast<glm::uint16>(0x3333);
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REG1 = ((REG1 << 1) | REG1) & static_cast<glm::uint16>(0x5555);
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REG2 = ((REG2 << 1) | REG2) & static_cast<glm::uint16>(0x5555);
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return REG1 | static_cast<glm::uint16>(REG2 << 1);
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}
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template<>
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GLM_FUNC_QUALIFIER glm::uint32 bitfieldInterleave(glm::uint16 x, glm::uint16 y)
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{
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glm::uint32 REG1(x);
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glm::uint32 REG2(y);
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REG1 = ((REG1 << 8) | REG1) & static_cast<glm::uint32>(0x00FF00FF);
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REG2 = ((REG2 << 8) | REG2) & static_cast<glm::uint32>(0x00FF00FF);
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REG1 = ((REG1 << 4) | REG1) & static_cast<glm::uint32>(0x0F0F0F0F);
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REG2 = ((REG2 << 4) | REG2) & static_cast<glm::uint32>(0x0F0F0F0F);
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REG1 = ((REG1 << 2) | REG1) & static_cast<glm::uint32>(0x33333333);
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REG2 = ((REG2 << 2) | REG2) & static_cast<glm::uint32>(0x33333333);
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REG1 = ((REG1 << 1) | REG1) & static_cast<glm::uint32>(0x55555555);
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REG2 = ((REG2 << 1) | REG2) & static_cast<glm::uint32>(0x55555555);
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return REG1 | (REG2 << 1);
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}
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template<>
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GLM_FUNC_QUALIFIER glm::uint64 bitfieldInterleave(glm::uint32 x, glm::uint32 y)
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{
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glm::uint64 REG1(x);
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glm::uint64 REG2(y);
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REG1 = ((REG1 << 16) | REG1) & static_cast<glm::uint64>(0x0000FFFF0000FFFFull);
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REG2 = ((REG2 << 16) | REG2) & static_cast<glm::uint64>(0x0000FFFF0000FFFFull);
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REG1 = ((REG1 << 8) | REG1) & static_cast<glm::uint64>(0x00FF00FF00FF00FFull);
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REG2 = ((REG2 << 8) | REG2) & static_cast<glm::uint64>(0x00FF00FF00FF00FFull);
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REG1 = ((REG1 << 4) | REG1) & static_cast<glm::uint64>(0x0F0F0F0F0F0F0F0Full);
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REG2 = ((REG2 << 4) | REG2) & static_cast<glm::uint64>(0x0F0F0F0F0F0F0F0Full);
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REG1 = ((REG1 << 2) | REG1) & static_cast<glm::uint64>(0x3333333333333333ull);
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REG2 = ((REG2 << 2) | REG2) & static_cast<glm::uint64>(0x3333333333333333ull);
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REG1 = ((REG1 << 1) | REG1) & static_cast<glm::uint64>(0x5555555555555555ull);
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REG2 = ((REG2 << 1) | REG2) & static_cast<glm::uint64>(0x5555555555555555ull);
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return REG1 | (REG2 << 1);
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}
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template<>
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GLM_FUNC_QUALIFIER glm::uint32 bitfieldInterleave(glm::uint8 x, glm::uint8 y, glm::uint8 z)
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{
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glm::uint32 REG1(x);
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glm::uint32 REG2(y);
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glm::uint32 REG3(z);
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REG1 = ((REG1 << 16) | REG1) & static_cast<glm::uint32>(0xFF0000FFu);
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REG2 = ((REG2 << 16) | REG2) & static_cast<glm::uint32>(0xFF0000FFu);
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REG3 = ((REG3 << 16) | REG3) & static_cast<glm::uint32>(0xFF0000FFu);
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REG1 = ((REG1 << 8) | REG1) & static_cast<glm::uint32>(0x0F00F00Fu);
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REG2 = ((REG2 << 8) | REG2) & static_cast<glm::uint32>(0x0F00F00Fu);
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REG3 = ((REG3 << 8) | REG3) & static_cast<glm::uint32>(0x0F00F00Fu);
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REG1 = ((REG1 << 4) | REG1) & static_cast<glm::uint32>(0xC30C30C3u);
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REG2 = ((REG2 << 4) | REG2) & static_cast<glm::uint32>(0xC30C30C3u);
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REG3 = ((REG3 << 4) | REG3) & static_cast<glm::uint32>(0xC30C30C3u);
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REG1 = ((REG1 << 2) | REG1) & static_cast<glm::uint32>(0x49249249u);
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REG2 = ((REG2 << 2) | REG2) & static_cast<glm::uint32>(0x49249249u);
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REG3 = ((REG3 << 2) | REG3) & static_cast<glm::uint32>(0x49249249u);
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return REG1 | (REG2 << 1) | (REG3 << 2);
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}
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template<>
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GLM_FUNC_QUALIFIER glm::uint64 bitfieldInterleave(glm::uint16 x, glm::uint16 y, glm::uint16 z)
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{
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glm::uint64 REG1(x);
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glm::uint64 REG2(y);
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glm::uint64 REG3(z);
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REG1 = ((REG1 << 32) | REG1) & static_cast<glm::uint64>(0xFFFF00000000FFFFull);
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REG2 = ((REG2 << 32) | REG2) & static_cast<glm::uint64>(0xFFFF00000000FFFFull);
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REG3 = ((REG3 << 32) | REG3) & static_cast<glm::uint64>(0xFFFF00000000FFFFull);
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REG1 = ((REG1 << 16) | REG1) & static_cast<glm::uint64>(0x00FF0000FF0000FFull);
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REG2 = ((REG2 << 16) | REG2) & static_cast<glm::uint64>(0x00FF0000FF0000FFull);
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REG3 = ((REG3 << 16) | REG3) & static_cast<glm::uint64>(0x00FF0000FF0000FFull);
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REG1 = ((REG1 << 8) | REG1) & static_cast<glm::uint64>(0xF00F00F00F00F00Full);
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REG2 = ((REG2 << 8) | REG2) & static_cast<glm::uint64>(0xF00F00F00F00F00Full);
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REG3 = ((REG3 << 8) | REG3) & static_cast<glm::uint64>(0xF00F00F00F00F00Full);
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REG1 = ((REG1 << 4) | REG1) & static_cast<glm::uint64>(0x30C30C30C30C30C3ull);
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REG2 = ((REG2 << 4) | REG2) & static_cast<glm::uint64>(0x30C30C30C30C30C3ull);
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REG3 = ((REG3 << 4) | REG3) & static_cast<glm::uint64>(0x30C30C30C30C30C3ull);
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REG1 = ((REG1 << 2) | REG1) & static_cast<glm::uint64>(0x9249249249249249ull);
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REG2 = ((REG2 << 2) | REG2) & static_cast<glm::uint64>(0x9249249249249249ull);
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REG3 = ((REG3 << 2) | REG3) & static_cast<glm::uint64>(0x9249249249249249ull);
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return REG1 | (REG2 << 1) | (REG3 << 2);
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}
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template<>
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GLM_FUNC_QUALIFIER glm::uint64 bitfieldInterleave(glm::uint32 x, glm::uint32 y, glm::uint32 z)
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{
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glm::uint64 REG1(x);
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glm::uint64 REG2(y);
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glm::uint64 REG3(z);
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REG1 = ((REG1 << 32) | REG1) & static_cast<glm::uint64>(0xFFFF00000000FFFFull);
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REG2 = ((REG2 << 32) | REG2) & static_cast<glm::uint64>(0xFFFF00000000FFFFull);
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REG3 = ((REG3 << 32) | REG3) & static_cast<glm::uint64>(0xFFFF00000000FFFFull);
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REG1 = ((REG1 << 16) | REG1) & static_cast<glm::uint64>(0x00FF0000FF0000FFull);
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REG2 = ((REG2 << 16) | REG2) & static_cast<glm::uint64>(0x00FF0000FF0000FFull);
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REG3 = ((REG3 << 16) | REG3) & static_cast<glm::uint64>(0x00FF0000FF0000FFull);
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REG1 = ((REG1 << 8) | REG1) & static_cast<glm::uint64>(0xF00F00F00F00F00Full);
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REG2 = ((REG2 << 8) | REG2) & static_cast<glm::uint64>(0xF00F00F00F00F00Full);
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REG3 = ((REG3 << 8) | REG3) & static_cast<glm::uint64>(0xF00F00F00F00F00Full);
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REG1 = ((REG1 << 4) | REG1) & static_cast<glm::uint64>(0x30C30C30C30C30C3ull);
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REG2 = ((REG2 << 4) | REG2) & static_cast<glm::uint64>(0x30C30C30C30C30C3ull);
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REG3 = ((REG3 << 4) | REG3) & static_cast<glm::uint64>(0x30C30C30C30C30C3ull);
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REG1 = ((REG1 << 2) | REG1) & static_cast<glm::uint64>(0x9249249249249249ull);
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REG2 = ((REG2 << 2) | REG2) & static_cast<glm::uint64>(0x9249249249249249ull);
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REG3 = ((REG3 << 2) | REG3) & static_cast<glm::uint64>(0x9249249249249249ull);
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return REG1 | (REG2 << 1) | (REG3 << 2);
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}
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template<>
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GLM_FUNC_QUALIFIER glm::uint32 bitfieldInterleave(glm::uint8 x, glm::uint8 y, glm::uint8 z, glm::uint8 w)
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{
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glm::uint32 REG1(x);
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glm::uint32 REG2(y);
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glm::uint32 REG3(z);
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glm::uint32 REG4(w);
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REG1 = ((REG1 << 12) | REG1) & static_cast<glm::uint32>(0x000F000Fu);
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REG2 = ((REG2 << 12) | REG2) & static_cast<glm::uint32>(0x000F000Fu);
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REG3 = ((REG3 << 12) | REG3) & static_cast<glm::uint32>(0x000F000Fu);
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REG4 = ((REG4 << 12) | REG4) & static_cast<glm::uint32>(0x000F000Fu);
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REG1 = ((REG1 << 6) | REG1) & static_cast<glm::uint32>(0x03030303u);
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REG2 = ((REG2 << 6) | REG2) & static_cast<glm::uint32>(0x03030303u);
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REG3 = ((REG3 << 6) | REG3) & static_cast<glm::uint32>(0x03030303u);
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REG4 = ((REG4 << 6) | REG4) & static_cast<glm::uint32>(0x03030303u);
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REG1 = ((REG1 << 3) | REG1) & static_cast<glm::uint32>(0x11111111u);
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REG2 = ((REG2 << 3) | REG2) & static_cast<glm::uint32>(0x11111111u);
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REG3 = ((REG3 << 3) | REG3) & static_cast<glm::uint32>(0x11111111u);
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REG4 = ((REG4 << 3) | REG4) & static_cast<glm::uint32>(0x11111111u);
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return REG1 | (REG2 << 1) | (REG3 << 2) | (REG4 << 3);
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}
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template<>
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GLM_FUNC_QUALIFIER glm::uint64 bitfieldInterleave(glm::uint16 x, glm::uint16 y, glm::uint16 z, glm::uint16 w)
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{
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glm::uint64 REG1(x);
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glm::uint64 REG2(y);
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glm::uint64 REG3(z);
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glm::uint64 REG4(w);
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REG1 = ((REG1 << 24) | REG1) & static_cast<glm::uint64>(0x000000FF000000FFull);
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REG2 = ((REG2 << 24) | REG2) & static_cast<glm::uint64>(0x000000FF000000FFull);
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REG3 = ((REG3 << 24) | REG3) & static_cast<glm::uint64>(0x000000FF000000FFull);
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REG4 = ((REG4 << 24) | REG4) & static_cast<glm::uint64>(0x000000FF000000FFull);
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REG1 = ((REG1 << 12) | REG1) & static_cast<glm::uint64>(0x000F000F000F000Full);
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REG2 = ((REG2 << 12) | REG2) & static_cast<glm::uint64>(0x000F000F000F000Full);
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REG3 = ((REG3 << 12) | REG3) & static_cast<glm::uint64>(0x000F000F000F000Full);
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REG4 = ((REG4 << 12) | REG4) & static_cast<glm::uint64>(0x000F000F000F000Full);
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REG1 = ((REG1 << 6) | REG1) & static_cast<glm::uint64>(0x0303030303030303ull);
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REG2 = ((REG2 << 6) | REG2) & static_cast<glm::uint64>(0x0303030303030303ull);
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REG3 = ((REG3 << 6) | REG3) & static_cast<glm::uint64>(0x0303030303030303ull);
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REG4 = ((REG4 << 6) | REG4) & static_cast<glm::uint64>(0x0303030303030303ull);
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REG1 = ((REG1 << 3) | REG1) & static_cast<glm::uint64>(0x1111111111111111ull);
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REG2 = ((REG2 << 3) | REG2) & static_cast<glm::uint64>(0x1111111111111111ull);
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REG3 = ((REG3 << 3) | REG3) & static_cast<glm::uint64>(0x1111111111111111ull);
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REG4 = ((REG4 << 3) | REG4) & static_cast<glm::uint64>(0x1111111111111111ull);
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return REG1 | (REG2 << 1) | (REG3 << 2) | (REG4 << 3);
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}
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}//namespace detail
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template<typename genIUType>
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GLM_FUNC_QUALIFIER genIUType mask(genIUType Bits)
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{
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GLM_STATIC_ASSERT(std::numeric_limits<genIUType>::is_integer, "'mask' accepts only integer values");
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return Bits >= sizeof(genIUType) * 8 ? ~static_cast<genIUType>(0) : (static_cast<genIUType>(1) << Bits) - static_cast<genIUType>(1);
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}
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template<length_t L, typename T, qualifier Q>
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GLM_FUNC_QUALIFIER vec<L, T, Q> mask(vec<L, T, Q> const& v)
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{
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GLM_STATIC_ASSERT(std::numeric_limits<T>::is_integer, "'mask' accepts only integer values");
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return detail::functor1<vec, L, T, T, Q>::call(mask, v);
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}
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template<typename genIType>
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GLM_FUNC_QUALIFIER genIType bitfieldRotateRight(genIType In, int Shift)
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{
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GLM_STATIC_ASSERT(std::numeric_limits<genIType>::is_integer, "'bitfieldRotateRight' accepts only integer values");
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int const BitSize = static_cast<genIType>(sizeof(genIType) * 8);
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return (In << static_cast<genIType>(Shift)) | (In >> static_cast<genIType>(BitSize - Shift));
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}
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template<length_t L, typename T, qualifier Q>
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GLM_FUNC_QUALIFIER vec<L, T, Q> bitfieldRotateRight(vec<L, T, Q> const& In, int Shift)
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{
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GLM_STATIC_ASSERT(std::numeric_limits<T>::is_integer, "'bitfieldRotateRight' accepts only integer values");
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int const BitSize = static_cast<int>(sizeof(T) * 8);
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return (In << static_cast<T>(Shift)) | (In >> static_cast<T>(BitSize - Shift));
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}
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template<typename genIType>
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GLM_FUNC_QUALIFIER genIType bitfieldRotateLeft(genIType In, int Shift)
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{
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GLM_STATIC_ASSERT(std::numeric_limits<genIType>::is_integer, "'bitfieldRotateLeft' accepts only integer values");
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int const BitSize = static_cast<genIType>(sizeof(genIType) * 8);
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return (In >> static_cast<genIType>(Shift)) | (In << static_cast<genIType>(BitSize - Shift));
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}
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template<length_t L, typename T, qualifier Q>
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GLM_FUNC_QUALIFIER vec<L, T, Q> bitfieldRotateLeft(vec<L, T, Q> const& In, int Shift)
|
||
|
|
{
|
||
|
|
GLM_STATIC_ASSERT(std::numeric_limits<T>::is_integer, "'bitfieldRotateLeft' accepts only integer values");
|
||
|
|
|
||
|
|
int const BitSize = static_cast<int>(sizeof(T) * 8);
|
||
|
|
return (In >> static_cast<T>(Shift)) | (In << static_cast<T>(BitSize - Shift));
|
||
|
|
}
|
||
|
|
|
||
|
|
template<typename genIUType>
|
||
|
|
GLM_FUNC_QUALIFIER genIUType bitfieldFillOne(genIUType Value, int FirstBit, int BitCount)
|
||
|
|
{
|
||
|
|
return Value | static_cast<genIUType>(mask(BitCount) << FirstBit);
|
||
|
|
}
|
||
|
|
|
||
|
|
template<length_t L, typename T, qualifier Q>
|
||
|
|
GLM_FUNC_QUALIFIER vec<L, T, Q> bitfieldFillOne(vec<L, T, Q> const& Value, int FirstBit, int BitCount)
|
||
|
|
{
|
||
|
|
return Value | static_cast<T>(mask(BitCount) << FirstBit);
|
||
|
|
}
|
||
|
|
|
||
|
|
template<typename genIUType>
|
||
|
|
GLM_FUNC_QUALIFIER genIUType bitfieldFillZero(genIUType Value, int FirstBit, int BitCount)
|
||
|
|
{
|
||
|
|
return Value & static_cast<genIUType>(~(mask(BitCount) << FirstBit));
|
||
|
|
}
|
||
|
|
|
||
|
|
template<length_t L, typename T, qualifier Q>
|
||
|
|
GLM_FUNC_QUALIFIER vec<L, T, Q> bitfieldFillZero(vec<L, T, Q> const& Value, int FirstBit, int BitCount)
|
||
|
|
{
|
||
|
|
return Value & static_cast<T>(~(mask(BitCount) << FirstBit));
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER int16 bitfieldInterleave(int8 x, int8 y)
|
||
|
|
{
|
||
|
|
union sign8
|
||
|
|
{
|
||
|
|
int8 i;
|
||
|
|
uint8 u;
|
||
|
|
} sign_x, sign_y;
|
||
|
|
|
||
|
|
union sign16
|
||
|
|
{
|
||
|
|
int16 i;
|
||
|
|
uint16 u;
|
||
|
|
} result;
|
||
|
|
|
||
|
|
sign_x.i = x;
|
||
|
|
sign_y.i = y;
|
||
|
|
result.u = bitfieldInterleave(sign_x.u, sign_y.u);
|
||
|
|
|
||
|
|
return result.i;
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER uint16 bitfieldInterleave(uint8 x, uint8 y)
|
||
|
|
{
|
||
|
|
return detail::bitfieldInterleave<uint8, uint16>(x, y);
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER uint16 bitfieldInterleave(u8vec2 const& v)
|
||
|
|
{
|
||
|
|
return detail::bitfieldInterleave<uint8, uint16>(v.x, v.y);
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER u8vec2 bitfieldDeinterleave(glm::uint16 x)
|
||
|
|
{
|
||
|
|
uint16 REG1(x);
|
||
|
|
uint16 REG2(x >>= 1);
|
||
|
|
|
||
|
|
REG1 = REG1 & static_cast<uint16>(0x5555);
|
||
|
|
REG2 = REG2 & static_cast<uint16>(0x5555);
|
||
|
|
|
||
|
|
REG1 = ((REG1 >> 1) | REG1) & static_cast<uint16>(0x3333);
|
||
|
|
REG2 = ((REG2 >> 1) | REG2) & static_cast<uint16>(0x3333);
|
||
|
|
|
||
|
|
REG1 = ((REG1 >> 2) | REG1) & static_cast<uint16>(0x0F0F);
|
||
|
|
REG2 = ((REG2 >> 2) | REG2) & static_cast<uint16>(0x0F0F);
|
||
|
|
|
||
|
|
REG1 = ((REG1 >> 4) | REG1) & static_cast<uint16>(0x00FF);
|
||
|
|
REG2 = ((REG2 >> 4) | REG2) & static_cast<uint16>(0x00FF);
|
||
|
|
|
||
|
|
REG1 = ((REG1 >> 8) | REG1) & static_cast<uint16>(0xFFFF);
|
||
|
|
REG2 = ((REG2 >> 8) | REG2) & static_cast<uint16>(0xFFFF);
|
||
|
|
|
||
|
|
return glm::u8vec2(REG1, REG2);
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER int32 bitfieldInterleave(int16 x, int16 y)
|
||
|
|
{
|
||
|
|
union sign16
|
||
|
|
{
|
||
|
|
int16 i;
|
||
|
|
uint16 u;
|
||
|
|
} sign_x, sign_y;
|
||
|
|
|
||
|
|
union sign32
|
||
|
|
{
|
||
|
|
int32 i;
|
||
|
|
uint32 u;
|
||
|
|
} result;
|
||
|
|
|
||
|
|
sign_x.i = x;
|
||
|
|
sign_y.i = y;
|
||
|
|
result.u = bitfieldInterleave(sign_x.u, sign_y.u);
|
||
|
|
|
||
|
|
return result.i;
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER uint32 bitfieldInterleave(uint16 x, uint16 y)
|
||
|
|
{
|
||
|
|
return detail::bitfieldInterleave<uint16, uint32>(x, y);
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER glm::uint32 bitfieldInterleave(u16vec2 const& v)
|
||
|
|
{
|
||
|
|
return detail::bitfieldInterleave<uint16, uint32>(v.x, v.y);
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER glm::u16vec2 bitfieldDeinterleave(glm::uint32 x)
|
||
|
|
{
|
||
|
|
glm::uint32 REG1(x);
|
||
|
|
glm::uint32 REG2(x >>= 1);
|
||
|
|
|
||
|
|
REG1 = REG1 & static_cast<glm::uint32>(0x55555555);
|
||
|
|
REG2 = REG2 & static_cast<glm::uint32>(0x55555555);
|
||
|
|
|
||
|
|
REG1 = ((REG1 >> 1) | REG1) & static_cast<glm::uint32>(0x33333333);
|
||
|
|
REG2 = ((REG2 >> 1) | REG2) & static_cast<glm::uint32>(0x33333333);
|
||
|
|
|
||
|
|
REG1 = ((REG1 >> 2) | REG1) & static_cast<glm::uint32>(0x0F0F0F0F);
|
||
|
|
REG2 = ((REG2 >> 2) | REG2) & static_cast<glm::uint32>(0x0F0F0F0F);
|
||
|
|
|
||
|
|
REG1 = ((REG1 >> 4) | REG1) & static_cast<glm::uint32>(0x00FF00FF);
|
||
|
|
REG2 = ((REG2 >> 4) | REG2) & static_cast<glm::uint32>(0x00FF00FF);
|
||
|
|
|
||
|
|
REG1 = ((REG1 >> 8) | REG1) & static_cast<glm::uint32>(0x0000FFFF);
|
||
|
|
REG2 = ((REG2 >> 8) | REG2) & static_cast<glm::uint32>(0x0000FFFF);
|
||
|
|
|
||
|
|
return glm::u16vec2(REG1, REG2);
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER int64 bitfieldInterleave(int32 x, int32 y)
|
||
|
|
{
|
||
|
|
union sign32
|
||
|
|
{
|
||
|
|
int32 i;
|
||
|
|
uint32 u;
|
||
|
|
} sign_x, sign_y;
|
||
|
|
|
||
|
|
union sign64
|
||
|
|
{
|
||
|
|
int64 i;
|
||
|
|
uint64 u;
|
||
|
|
} result;
|
||
|
|
|
||
|
|
sign_x.i = x;
|
||
|
|
sign_y.i = y;
|
||
|
|
result.u = bitfieldInterleave(sign_x.u, sign_y.u);
|
||
|
|
|
||
|
|
return result.i;
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER uint64 bitfieldInterleave(uint32 x, uint32 y)
|
||
|
|
{
|
||
|
|
return detail::bitfieldInterleave<uint32, uint64>(x, y);
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER glm::uint64 bitfieldInterleave(u32vec2 const& v)
|
||
|
|
{
|
||
|
|
return detail::bitfieldInterleave<uint32, uint64>(v.x, v.y);
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER glm::u32vec2 bitfieldDeinterleave(glm::uint64 x)
|
||
|
|
{
|
||
|
|
glm::uint64 REG1(x);
|
||
|
|
glm::uint64 REG2(x >>= 1);
|
||
|
|
|
||
|
|
REG1 = REG1 & static_cast<glm::uint64>(0x5555555555555555ull);
|
||
|
|
REG2 = REG2 & static_cast<glm::uint64>(0x5555555555555555ull);
|
||
|
|
|
||
|
|
REG1 = ((REG1 >> 1) | REG1) & static_cast<glm::uint64>(0x3333333333333333ull);
|
||
|
|
REG2 = ((REG2 >> 1) | REG2) & static_cast<glm::uint64>(0x3333333333333333ull);
|
||
|
|
|
||
|
|
REG1 = ((REG1 >> 2) | REG1) & static_cast<glm::uint64>(0x0F0F0F0F0F0F0F0Full);
|
||
|
|
REG2 = ((REG2 >> 2) | REG2) & static_cast<glm::uint64>(0x0F0F0F0F0F0F0F0Full);
|
||
|
|
|
||
|
|
REG1 = ((REG1 >> 4) | REG1) & static_cast<glm::uint64>(0x00FF00FF00FF00FFull);
|
||
|
|
REG2 = ((REG2 >> 4) | REG2) & static_cast<glm::uint64>(0x00FF00FF00FF00FFull);
|
||
|
|
|
||
|
|
REG1 = ((REG1 >> 8) | REG1) & static_cast<glm::uint64>(0x0000FFFF0000FFFFull);
|
||
|
|
REG2 = ((REG2 >> 8) | REG2) & static_cast<glm::uint64>(0x0000FFFF0000FFFFull);
|
||
|
|
|
||
|
|
REG1 = ((REG1 >> 16) | REG1) & static_cast<glm::uint64>(0x00000000FFFFFFFFull);
|
||
|
|
REG2 = ((REG2 >> 16) | REG2) & static_cast<glm::uint64>(0x00000000FFFFFFFFull);
|
||
|
|
|
||
|
|
return glm::u32vec2(REG1, REG2);
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER int32 bitfieldInterleave(int8 x, int8 y, int8 z)
|
||
|
|
{
|
||
|
|
union sign8
|
||
|
|
{
|
||
|
|
int8 i;
|
||
|
|
uint8 u;
|
||
|
|
} sign_x, sign_y, sign_z;
|
||
|
|
|
||
|
|
union sign32
|
||
|
|
{
|
||
|
|
int32 i;
|
||
|
|
uint32 u;
|
||
|
|
} result;
|
||
|
|
|
||
|
|
sign_x.i = x;
|
||
|
|
sign_y.i = y;
|
||
|
|
sign_z.i = z;
|
||
|
|
result.u = bitfieldInterleave(sign_x.u, sign_y.u, sign_z.u);
|
||
|
|
|
||
|
|
return result.i;
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER uint32 bitfieldInterleave(uint8 x, uint8 y, uint8 z)
|
||
|
|
{
|
||
|
|
return detail::bitfieldInterleave<uint8, uint32>(x, y, z);
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER uint32 bitfieldInterleave(u8vec3 const& v)
|
||
|
|
{
|
||
|
|
return detail::bitfieldInterleave<uint8, uint32>(v.x, v.y, v.z);
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER int64 bitfieldInterleave(int16 x, int16 y, int16 z)
|
||
|
|
{
|
||
|
|
union sign16
|
||
|
|
{
|
||
|
|
int16 i;
|
||
|
|
uint16 u;
|
||
|
|
} sign_x, sign_y, sign_z;
|
||
|
|
|
||
|
|
union sign64
|
||
|
|
{
|
||
|
|
int64 i;
|
||
|
|
uint64 u;
|
||
|
|
} result;
|
||
|
|
|
||
|
|
sign_x.i = x;
|
||
|
|
sign_y.i = y;
|
||
|
|
sign_z.i = z;
|
||
|
|
result.u = bitfieldInterleave(sign_x.u, sign_y.u, sign_z.u);
|
||
|
|
|
||
|
|
return result.i;
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER uint64 bitfieldInterleave(uint16 x, uint16 y, uint16 z)
|
||
|
|
{
|
||
|
|
return detail::bitfieldInterleave<uint32, uint64>(x, y, z);
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER uint64 bitfieldInterleave(u16vec3 const& v)
|
||
|
|
{
|
||
|
|
return detail::bitfieldInterleave<uint32, uint64>(v.x, v.y, v.z);
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER int64 bitfieldInterleave(int32 x, int32 y, int32 z)
|
||
|
|
{
|
||
|
|
union sign16
|
||
|
|
{
|
||
|
|
int32 i;
|
||
|
|
uint32 u;
|
||
|
|
} sign_x, sign_y, sign_z;
|
||
|
|
|
||
|
|
union sign64
|
||
|
|
{
|
||
|
|
int64 i;
|
||
|
|
uint64 u;
|
||
|
|
} result;
|
||
|
|
|
||
|
|
sign_x.i = x;
|
||
|
|
sign_y.i = y;
|
||
|
|
sign_z.i = z;
|
||
|
|
result.u = bitfieldInterleave(sign_x.u, sign_y.u, sign_z.u);
|
||
|
|
|
||
|
|
return result.i;
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER uint64 bitfieldInterleave(uint32 x, uint32 y, uint32 z)
|
||
|
|
{
|
||
|
|
return detail::bitfieldInterleave<uint32, uint64>(x, y, z);
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER uint64 bitfieldInterleave(u32vec3 const& v)
|
||
|
|
{
|
||
|
|
return detail::bitfieldInterleave<uint32, uint64>(v.x, v.y, v.z);
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER int32 bitfieldInterleave(int8 x, int8 y, int8 z, int8 w)
|
||
|
|
{
|
||
|
|
union sign8
|
||
|
|
{
|
||
|
|
int8 i;
|
||
|
|
uint8 u;
|
||
|
|
} sign_x, sign_y, sign_z, sign_w;
|
||
|
|
|
||
|
|
union sign32
|
||
|
|
{
|
||
|
|
int32 i;
|
||
|
|
uint32 u;
|
||
|
|
} result;
|
||
|
|
|
||
|
|
sign_x.i = x;
|
||
|
|
sign_y.i = y;
|
||
|
|
sign_z.i = z;
|
||
|
|
sign_w.i = w;
|
||
|
|
result.u = bitfieldInterleave(sign_x.u, sign_y.u, sign_z.u, sign_w.u);
|
||
|
|
|
||
|
|
return result.i;
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER uint32 bitfieldInterleave(uint8 x, uint8 y, uint8 z, uint8 w)
|
||
|
|
{
|
||
|
|
return detail::bitfieldInterleave<uint8, uint32>(x, y, z, w);
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER uint32 bitfieldInterleave(u8vec4 const& v)
|
||
|
|
{
|
||
|
|
return detail::bitfieldInterleave<uint8, uint32>(v.x, v.y, v.z, v.w);
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER int64 bitfieldInterleave(int16 x, int16 y, int16 z, int16 w)
|
||
|
|
{
|
||
|
|
union sign16
|
||
|
|
{
|
||
|
|
int16 i;
|
||
|
|
uint16 u;
|
||
|
|
} sign_x, sign_y, sign_z, sign_w;
|
||
|
|
|
||
|
|
union sign64
|
||
|
|
{
|
||
|
|
int64 i;
|
||
|
|
uint64 u;
|
||
|
|
} result;
|
||
|
|
|
||
|
|
sign_x.i = x;
|
||
|
|
sign_y.i = y;
|
||
|
|
sign_z.i = z;
|
||
|
|
sign_w.i = w;
|
||
|
|
result.u = bitfieldInterleave(sign_x.u, sign_y.u, sign_z.u, sign_w.u);
|
||
|
|
|
||
|
|
return result.i;
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER uint64 bitfieldInterleave(uint16 x, uint16 y, uint16 z, uint16 w)
|
||
|
|
{
|
||
|
|
return detail::bitfieldInterleave<uint16, uint64>(x, y, z, w);
|
||
|
|
}
|
||
|
|
|
||
|
|
GLM_FUNC_QUALIFIER uint64 bitfieldInterleave(u16vec4 const& v)
|
||
|
|
{
|
||
|
|
return detail::bitfieldInterleave<uint16, uint64>(v.x, v.y, v.z, v.w);
|
||
|
|
}
|
||
|
|
}//namespace glm
|