2013-02-22 02:27:53 +00:00
|
|
|
Release 14.1 Map P.15xf (nt)
|
|
|
|
|
Xilinx Mapping Report File for Design 'main'
|
|
|
|
|
|
|
|
|
|
Design Information
|
|
|
|
|
------------------
|
|
|
|
|
Command Line : map -intstyle ise -p xc3s250e-cp132-5 -cm area -ir off -pr off
|
|
|
|
|
-c 100 -o main_map.ncd main.ngd main.pcf
|
|
|
|
|
Target Device : xc3s250e
|
|
|
|
|
Target Package : cp132
|
|
|
|
|
Target Speed : -5
|
|
|
|
|
Mapper Version : spartan3e -- $Revision: 1.55 $
|
2013-02-22 22:00:03 +00:00
|
|
|
Mapped Date : Fri Feb 22 15:42:09 2013
|
2013-02-22 02:27:53 +00:00
|
|
|
|
|
|
|
|
Design Summary
|
|
|
|
|
--------------
|
|
|
|
|
Number of errors: 0
|
|
|
|
|
Number of warnings: 0
|
|
|
|
|
Logic Utilization:
|
2013-02-22 22:00:03 +00:00
|
|
|
Total Number Slice Registers: 146 out of 4,896 2%
|
|
|
|
|
Number used as Flip Flops: 145
|
|
|
|
|
Number used as Latches: 1
|
|
|
|
|
Number of 4 input LUTs: 508 out of 4,896 10%
|
2013-02-22 02:27:53 +00:00
|
|
|
Logic Distribution:
|
2013-02-22 22:00:03 +00:00
|
|
|
Number of occupied Slices: 318 out of 2,448 12%
|
|
|
|
|
Number of Slices containing only related logic: 318 out of 318 100%
|
|
|
|
|
Number of Slices containing unrelated logic: 0 out of 318 0%
|
2013-02-22 02:27:53 +00:00
|
|
|
*See NOTES below for an explanation of the effects of unrelated logic.
|
2013-02-22 22:00:03 +00:00
|
|
|
Total Number of 4 input LUTs: 584 out of 4,896 11%
|
|
|
|
|
Number used as logic: 508
|
|
|
|
|
Number used as a route-thru: 76
|
2013-02-22 02:27:53 +00:00
|
|
|
|
|
|
|
|
The Slice Logic Distribution report is not meaningful if the design is
|
|
|
|
|
over-mapped for a non-slice resource or if Placement fails.
|
|
|
|
|
|
2013-02-22 22:00:03 +00:00
|
|
|
Number of bonded IOBs: 20 out of 92 21%
|
|
|
|
|
Number of BUFGMUXs: 2 out of 24 8%
|
2013-02-22 02:27:53 +00:00
|
|
|
|
2013-02-22 22:00:03 +00:00
|
|
|
Average Fanout of Non-Clock Nets: 2.78
|
2013-02-22 02:27:53 +00:00
|
|
|
|
2013-02-22 22:00:03 +00:00
|
|
|
Peak Memory Usage: 212 MB
|
|
|
|
|
Total REAL time to MAP completion: 2 secs
|
|
|
|
|
Total CPU time to MAP completion: 2 secs
|
2013-02-22 02:27:53 +00:00
|
|
|
|
|
|
|
|
NOTES:
|
|
|
|
|
|
|
|
|
|
Related logic is defined as being logic that shares connectivity - e.g. two
|
|
|
|
|
LUTs are "related" if they share common inputs. When assembling slices,
|
|
|
|
|
Map gives priority to combine logic that is related. Doing so results in
|
|
|
|
|
the best timing performance.
|
|
|
|
|
|
|
|
|
|
Unrelated logic shares no connectivity. Map will only begin packing
|
|
|
|
|
unrelated logic into a slice once 99% of the slices are occupied through
|
|
|
|
|
related logic packing.
|
|
|
|
|
|
|
|
|
|
Note that once logic distribution reaches the 99% level through related
|
|
|
|
|
logic packing, this does not mean the device is completely utilized.
|
|
|
|
|
Unrelated logic packing will then begin, continuing until all usable LUTs
|
|
|
|
|
and FFs are occupied. Depending on your timing budget, increased levels of
|
|
|
|
|
unrelated logic packing may adversely affect the overall timing performance
|
|
|
|
|
of your design.
|
|
|
|
|
|
|
|
|
|
Table of Contents
|
|
|
|
|
-----------------
|
|
|
|
|
Section 1 - Errors
|
|
|
|
|
Section 2 - Warnings
|
|
|
|
|
Section 3 - Informational
|
|
|
|
|
Section 4 - Removed Logic Summary
|
|
|
|
|
Section 5 - Removed Logic
|
|
|
|
|
Section 6 - IOB Properties
|
|
|
|
|
Section 7 - RPMs
|
|
|
|
|
Section 8 - Guide Report
|
|
|
|
|
Section 9 - Area Group and Partition Summary
|
|
|
|
|
Section 10 - Timing Report
|
|
|
|
|
Section 11 - Configuration String Information
|
|
|
|
|
Section 12 - Control Set Information
|
|
|
|
|
Section 13 - Utilization by Hierarchy
|
|
|
|
|
|
|
|
|
|
Section 1 - Errors
|
|
|
|
|
------------------
|
|
|
|
|
|
|
|
|
|
Section 2 - Warnings
|
|
|
|
|
--------------------
|
|
|
|
|
|
|
|
|
|
Section 3 - Informational
|
|
|
|
|
-------------------------
|
|
|
|
|
INFO:MapLib:562 - No environment variables are currently set.
|
|
|
|
|
|
|
|
|
|
Section 4 - Removed Logic Summary
|
|
|
|
|
---------------------------------
|
2013-02-22 22:00:03 +00:00
|
|
|
4 block(s) optimized away
|
2013-02-22 02:27:53 +00:00
|
|
|
|
|
|
|
|
Section 5 - Removed Logic
|
|
|
|
|
-------------------------
|
|
|
|
|
|
|
|
|
|
Optimized Block(s):
|
|
|
|
|
TYPE BLOCK
|
|
|
|
|
GND XST_GND
|
|
|
|
|
VCC XST_VCC
|
2013-02-22 22:00:03 +00:00
|
|
|
MUXCY Maccum_cx_cy<0>
|
|
|
|
|
MUXCY Maccum_cy_cy<0>
|
2013-02-22 02:27:53 +00:00
|
|
|
|
|
|
|
|
To enable printing of redundant blocks removed and signals merged, set the
|
|
|
|
|
detailed map report option and rerun map.
|
|
|
|
|
|
|
|
|
|
Section 6 - IOB Properties
|
|
|
|
|
--------------------------
|
|
|
|
|
|
|
|
|
|
+---------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
|
|
|
| IOB Name | Type | Direction | IO Standard | Diff | Drive | Slew | Reg (s) | Resistor | IOB |
|
|
|
|
|
| | | | | Term | Strength | Rate | | | Delay |
|
|
|
|
|
+---------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
|
|
|
| CLK | IBUF | INPUT | LVCMOS25 | | | | | | 0 / 0 |
|
|
|
|
|
| HS | IOB | OUTPUT | LVCMOS33 | | 8 | FAST | | | 0 / 0 |
|
|
|
|
|
| LED<0> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | 0 / 0 |
|
|
|
|
|
| LED<1> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | 0 / 0 |
|
|
|
|
|
| LED<2> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | 0 / 0 |
|
|
|
|
|
| LED<3> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | 0 / 0 |
|
|
|
|
|
| LED<4> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | 0 / 0 |
|
|
|
|
|
| LED<5> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | 0 / 0 |
|
|
|
|
|
| LED<6> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | 0 / 0 |
|
|
|
|
|
| LED<7> | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | 0 / 0 |
|
2013-02-22 22:00:03 +00:00
|
|
|
| POUT | IOB | OUTPUT | LVCMOS25 | | 12 | SLOW | | | 0 / 0 |
|
2013-02-22 02:27:53 +00:00
|
|
|
| RGB<0> | IOB | OUTPUT | LVCMOS33 | | 8 | FAST | | | 0 / 0 |
|
|
|
|
|
| RGB<1> | IOB | OUTPUT | LVCMOS33 | | 8 | FAST | | | 0 / 0 |
|
|
|
|
|
| RGB<2> | IOB | OUTPUT | LVCMOS33 | | 8 | FAST | | | 0 / 0 |
|
|
|
|
|
| RGB<3> | IOB | OUTPUT | LVCMOS33 | | 8 | FAST | | | 0 / 0 |
|
|
|
|
|
| RGB<4> | IOB | OUTPUT | LVCMOS33 | | 8 | FAST | | | 0 / 0 |
|
|
|
|
|
| RGB<5> | IOB | OUTPUT | LVCMOS33 | | 8 | FAST | | | 0 / 0 |
|
|
|
|
|
| RGB<6> | IOB | OUTPUT | LVCMOS33 | | 8 | FAST | | | 0 / 0 |
|
|
|
|
|
| RGB<7> | IOB | OUTPUT | LVCMOS33 | | 8 | FAST | | | 0 / 0 |
|
|
|
|
|
| VS | IOB | OUTPUT | LVCMOS33 | | 8 | FAST | | | 0 / 0 |
|
|
|
|
|
+---------------------------------------------------------------------------------------------------------------------------------------------------------+
|
|
|
|
|
|
|
|
|
|
Section 7 - RPMs
|
|
|
|
|
----------------
|
|
|
|
|
|
|
|
|
|
Section 8 - Guide Report
|
|
|
|
|
------------------------
|
|
|
|
|
Guide not run on this design.
|
|
|
|
|
|
|
|
|
|
Section 9 - Area Group and Partition Summary
|
|
|
|
|
--------------------------------------------
|
|
|
|
|
|
|
|
|
|
Partition Implementation Status
|
|
|
|
|
-------------------------------
|
|
|
|
|
|
|
|
|
|
No Partitions were found in this design.
|
|
|
|
|
|
|
|
|
|
-------------------------------
|
|
|
|
|
|
|
|
|
|
Area Group Information
|
|
|
|
|
----------------------
|
|
|
|
|
|
|
|
|
|
No area groups were found in this design.
|
|
|
|
|
|
|
|
|
|
----------------------
|
|
|
|
|
|
|
|
|
|
Section 10 - Timing Report
|
|
|
|
|
--------------------------
|
|
|
|
|
This design was not run using timing mode.
|
|
|
|
|
|
|
|
|
|
Section 11 - Configuration String Details
|
|
|
|
|
-----------------------------------------
|
|
|
|
|
Use the "-detail" map option to print out Configuration Strings
|
|
|
|
|
|
|
|
|
|
Section 12 - Control Set Information
|
|
|
|
|
------------------------------------
|
|
|
|
|
No control set information for this architecture.
|
|
|
|
|
|
|
|
|
|
Section 13 - Utilization by Hierarchy
|
|
|
|
|
-------------------------------------
|
|
|
|
|
Use the "-detail" map option to print out the Utilization by Hierarchy section.
|
